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Table 3 summary of the maximum number of arithmetic additions, and memory size

From: Low complexity frequency domain hybrid-ARQ chase combining for broadband MIMO CDMA systems

 

Chip-Level Combining

Symbol-Level Combining

Arithmetic Additions

2T c N T (K - 1) (N T + 1)

T s N T (K - 1) Niter 2M

Memory

2T c N T (N T + 1)

T s N T 2M