Table 5 Optimized synthesis results for ASIC
From: Configurable M-factor VLSI DVB-S2 LDPC decoder architecture with optimized memory tiling design
360 | 180 | 90 | 45 | 45-optimized | |
|---|---|---|---|---|---|
Technology (nm) | 90 | 90 | 90 | 90 | 90 |
Max. voltage (V) | 1.32 | 1.32 | 1.32 | 1.32 | 1.32 |
Typ. voltage (V) | 1.1 | 1.1 | 1.1 | 1.1 | 1.1 |
Min. voltage (V) | 1.08 | 1.08 | 1.08 | 1.08 | 1.08 |
Max. temperature (°C) | 125 | 125 | 125 | 125 | 125 |
Typ. temperature (°C) | 25 | 25 | 25 | 25 | 25 |
Min. temperature (°C) | -40 | -40 | -40 | -40 | -40 |
Freq. operation (MHz) | 100 | 100 | 100 | 100 | 100 |
Power (mW) | 290 | 185 | 130 | 105 | 85 |
Current (mA) | 260 | 170 | 120 | 95 | 75 |
Gate count (Mgates) | 9.6 | 6.2 | 4.4 | 3.5 | 2.8 |
Area (mm2) | 21.2 | 13.6 | 9.7 | 7.7 | 6.2 |