From: Dynamic voltage and frequency scaling scheme for an adaptive LDPC decoder using SNR estimation
Definition | LDPC decoding |
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H mn | the value at row m and col n of H-matrix |
N(m) | the set of bit nodes including the check node m |
M(n) | the set of check nodes including the bit node n |
Algorithm | |
Initialization | set F n = LLR for bit nodes (n = 1,2,…,N) |
set Z mn = F n if H mn is 1 for each (m,n) | |
while (i ≤ imax) | |
Check node | for each check node |
Processing | where each (m,n) if H mn is 1 |
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end for | |
Bit node | for each bit node |
Processing | where each (m,n) if Hmn is 1 |
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end for | |
Tentative | for each n (n = 1,2,…,N) |
Decision |
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end for | |
Parity check | if is 0 |
return success | |
i ++ | |
end while |