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Table 3 Minimum operating frequency to iteration number satisfying CMMB throughput (CMMB r= 1/2)

From: Dynamic voltage and frequency scaling scheme for an adaptive LDPC decoder using SNR estimation

Max iteration # Throughput (Mbps) Operating clock (MHz)
26 11.10 185
25 10.29 165
24 10.71 165
23 11.16 165
22 10.24 145
21 10.71 145
20 11.23 145
19 10.18 125
18 10.73 125
17 11.34 125
16 10.10 105
15 10.74 105
14 11.48 105
13 9.98 85
12 10.77 85
11 11.70 85
10 9.79 65
9 10.81 65
8 12.06 65
7 9.45 45
6 10.88 45
5 12.83 45
4 8.67 25
  1. Entries that are written in bold face type indicate the minimum clock speed that satisfies the throughput requirement for CMMB with the corresponding iteration count.