| FFs | Slice LUTs | DSP48 | RAM |
---|---|---|---|---|
 |  |  | (Multipliers) |  |
Proposed | 3,920 | 3,439 | 17 | 1 |
Conventional scheme1 | 3,354 | 3,117 | 15 | 4 |
(no iteration) | Â | Â | Â | Â |
Conventional scheme1 | 6,785 | 6,341 | 30 | 8 |
(one iteration) | Â | Â | Â | Â |
Conventional scheme2 | 5,749 | 5,383 | 171 | 0 |
Available in FPGA | 607,200 | 303,600 | 2,800 | 1,030 |