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Table 3 Dynamic power scaling factor for different FPGA families and IPs

From: Energy efficiency analysis of hybrid-ARQ relay-assisted schemes in LTE-based systems

  

Scaling factors

  

Power estimations (mW)

  

IP name

 

Virtex-4 (ref)

Virtex-5

Virtex-6

Virtex-4

Virtex-5

Virtex-6

FIR Filter

2 taps

1

0.479

0.225

54.67

26.19

12.285

 

32 taps

1

0.399

0.1015

1087

433.79

110.41

 

62 taps

1

0.391

0.104

1611

630.72

167.58

 

112 taps

1

0.414

0.1261

1850

767.14

233.42

QAM Modulator

QPSK

1

0.415

0.263

8.33

3.47

2.19

 

16QAM

1

0.306

0.304

8.02

2.46

2.44

 

64QAM

1

0.317

0.23

12.44

3.94

2.88

QAM Demodulator

QPSK

1

0.368

0.266

7.15

2.63

1.9

 

16QAM

1

0.259

0.212

13.56

3.51

2.88

 

64QAM

1

0.395

0.21

17.09

6.75

3.58

IFFT

128pts

1

0.465

0.332

697

324

231

 

256pts

1

0.438

0.303

846.7

370.6

256.52

 

512pts

1

0.393

0.277

1159

456

321

 

1024pts

1

0.363

0.258

1407

511

364

 

2048pts1

1

0.478

0.293

1143

546.5

335.6

  1. 1Lower power due to the automatic implementation of BRAMS by the design tool