Table 2 Main simulation parameters
Parameter | Values |
|---|---|
Circuit power at UEi, E C | 100 W |
Channel bandwidth, B | 10 Mhz |
Path loss for all links in the system, P L k , k∈[X,Y,Z,W] | (148+40log10(r k ))−1 dB |
Thermal noise density, Ω 0 | − 174 dBm/Hz |
Energy conversion efficiency, η | 1 |
TS and PS ratios, α 1=α 2=β | 0.1 |
Power allocation, λ | 0.7 |
Hardware impairments level, κ | 0.15 |
SNDR threshold at UE2, Γ D | 3 dB |
SNDR threshold at UE3, Γ D | 1 dB |