EURASIP Journal on Wireless Communications and Networking

Table 3 Comparison on public key cryptographic systems

From: High-speed hardware architecture for implementations of multivariate signature generations on FPGAs

Scheme	Executing Time (μs)	Clock cycle
ECC [2]	41	4100
Rainbow [38]	7.9	198
UOV [40]	5.85	1170
amTTS [40]	2.438	195
enTTS [40]	2.025	162
enTTS (this paper)	0.9	90

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