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Fig. 2 | EURASIP Journal on Wireless Communications and Networking

Fig. 2

From: FPGA-embedded Linearized Bregman Iteration algorithm for trend break detection

Fig. 2

Hardware implementation of a single BRAM slice in the LBI core structure. The parallel structures are pictorially depicted in three-dimensional depth. The Pipelined Multiplexer Tree (PMT) is synchronized to the PAT such that, after a summation, the correct value of y is ready for subtraction. The value of μk—refer to Algorithm 1—is calculated in a pipelined CORDIC structure

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