Table 2 Comparison with state-of-the-art high-throughput LDPC decoders
From: Beyond 100 Gbit/s Pipeline Decoders for Spatially Coupled LDPC Codes
Decoder | This work | [15] | [22] | [5] | [8] |
|---|---|---|---|---|---|
Code | SC-LDPC | LDPC-CC | LDPC-CC | LDPC-BC | LDPC-BC |
(Sub-)block size | 640 | n/a | n/a | 2048 | 648 |
Code Rate | 0.798 | 1/2–4/5 | 1/2 | 0.84 | 0.83 |
CMOS Technology | 22nm | 65nm | 90nm | 28nm | 22nm |
Supply Voltage [V] | 0.8 | 1.20 | 0.8 | 1.0 | 0.8 |
Processing | Column | Row | Row | Block | Block |
Architecture | Compact | Compact | Layered | Unrolled | Unrolled |
\(\#\) Processors | 9 | 6 | 4 | 5 | 8 |
Quantization [bit] | 4 | 6 | 6 | 3 | 4 |
Eb/N\(_0\) at BER \(10^{-6}\) [dB] | 4.2 | n/a | \(\sim\) 3 | \(\sim\) 4.7 | 4.9 |
Frequency [MHz] | 693 | 322 | 305 | 862 | 837 |
Decoding Latency [ns] | 30.3 | n/a | n/a | 69.6 | 31.0 |
Post P &R Area [mm\(^2\)] | 1.68 | 1.6 | 2.18 | 16.2 | 1.75 |
Throughput [Gbit/s] | 443 | 7.72 | 3.66 | 588 | 542 |
Energy Eff. [pJ/bit] | 8.5 | 53.4 | 75.2 | 22.7 | 5.8 |
Energy Eff. per proc. [pJ/bit] | 0.94 | 8.9 | 18.8 | 4.5 | 0.73 |
Area Eff. [Gbit/s/mm\(^2\)] | 263 | 4.8 | 1.7 | 36.3 | 311 |