Fig. 1
From: An analytical approach to error detection and correction for onboard nanosatellites
Satellite OBCHD ASIC structure. Figure comprises 4 subsystems where a 32-bit RISC processor center is adjusted for space utilization, a subsystem of picture dealing with the unit, a communication association for the satellite, and a supporting fringe subsystem. OBC is the most component of two scaled-down OBCDH frameworks. To serve an introductory model of the advanced portion of the OBCDH ASIC, this onboard computer framework on a chip shown in figure