Fig. 10
From: An analytical approach to error detection and correction for onboard nanosatellites
An Analytical approach to the decoder mechanism for EDAC. Decoder consists of Five interleavers and de-interleavers separated SISO decoders, as shown in Fig. 10. Because of noise, encoded output data bit can get corrupted and enter the input of the decoder as r0 for the device bit, r1 for parity-1, r2 for parity-2, r3 for parity-3, r4 for parity-4, r5 for parity-5. They are fed to the first SISO decoder with these inputs. SISO first, the decoder takes the obtained data bits as input, sequence r0 and parity sequence r1 got, which is RSC generated encoder 1, Sequence of output results