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EURASIP Journal on Wireless Communications and Networking
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Charge-Domain Signal Processing of Direct RF Sampling Mixer with Discrete-Time Filters in Bluetooth and GSM Receivers

EURASIP Journal on Wireless Communications and Networking volume 2006, Article number: 062905 (2006) Cite this article

Abstract

RF circuits for multi-GHz frequencies have recently migrated to low-cost digital deep-submicron CMOS processes. Unfortunately, this process environment, which is optimized only for digital logic and SRAM memory, is extremely unfriendly for conventional analog and RF designs. We present fundamental techniques recently developed that transform the RF and analog circuit design complexity to digitally intensive domain for a wireless RF transceiver, so that it enjoys benefits of digital and switched-capacitor approaches. Direct RF sampling techniques allow great flexibility in reconfigurable radio design. Digital signal processing concepts are used to help relieve analog design complexity, allowing one to reduce cost and power consumption in a reconfigurable design environment. The ideas presented have been used in Texas Instruments to develop two generations of commercial digital RF processors: a single-chip Bluetooth radio and a single-chip GSM radio. We further present details of the RF receiver front end for a GSM radio realized in a 90-nm digital CMOS technology. The circuit consisting of low-noise amplifier, transconductance amplifier, and switching mixer offers dB dynamic range with digitally configurable voltage gain of 40 dB down to dB. A series of decimation and discrete-time filtering follows the mixer and performs a highly linear second-order lowpass filtering to reject close-in interferers. The front-end gains can be configured with an automatic gain control to select an optimal setting to form a trade-off between noise figure and linearity and to compensate the process and temperature variations. Even under the digital switching activity, noise figure at the 40 dB maximum gain is 1.8 dB and dBm IIP2 at the 34 dB gain. The variation of the input matching versus multiple gains is less than 1 dB. The circuit in total occupies 3.1. The LNA, TA, and mixer consume less than mA at a supply voltage of 1.4 V.

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References

  1. Abidi AA: RF CMOS comes of age. IEEE Journal of Solid-State Circuits 2004,39(4):549–561. 10.1109/JSSC.2004.825247

    Article  Google Scholar 

  2. Krenik W, Buss D, Rickert P: Cellular handset integration—SIP vs. SOC. Proceedings of IEEE Custom Integrated Circuits Conference (CICC '04), October 2004, Orlando, Fla, USA 63–70.

    Google Scholar 

  3. Muhammad K, Leipold D, Staszewski RB, et al.: A discrete-time Bluetooth receiver in a 0.13/spl/m digital CMOS process. Proceedings of IEEE International Conference on Solid-State Circuits (ISSCC '04), February 2004, San Francisco, Calif, USA 1: 268–269, 527.

    Google Scholar 

  4. Muhammad K, Staszewski RB: Direct RF sampling mixer with recursive filtering in charge domain. Proceedings of the International Symposium on Circuits and Systems (ISCAS '04), May 2004, Vancouver, BC, Canada 1: I-577-I-580. sec. ASP-L29.5

    Google Scholar 

  5. Muhammad K, Staszewski RB, Hung C-M: Joint common mode voltage and differential offset voltage control scheme in a low-IF receiver. Proceedings of IEEE Radio Frequency Integrated Circuits Symposium (RFIC '04), June 2004, Fort Worth, Tex, USA 405–408. sec. TU3C-2

    Google Scholar 

  6. Staszewski RB, Muhammad K, Leipold D, et al.: All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS. IEEE Journal of Solid-State Circuits 2004,39(12):2278–2291.

    Article  Google Scholar 

  7. Karvonen S, Riley T, Kostamovaara J: A low noise quadrature subsampling mixer. Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS '01), May 2001, Sydney, NSW, Australia 4: 790–793.

    Google Scholar 

  8. Lindfors S, Parssinen A, Halonen KA: A 3-V 230-MHz CMOS decimation subsampler. IEEE Transactions on Circuits and Systems II 2003,50(3):105–117. 10.1109/TCSII.2002.807757

    Article  Google Scholar 

  9. Muhammad K, Ho Y-C, Mayhugh T, et al.: A discrete time quad-band GSM/GPRS receiver in a 90nm digital CMOS process. Proceedings of IEEE Custom Integrated Circuits Conference (CICC '05), September 2005, San Jose, Calif, USA 809–812. sec. 28–5

    Google Scholar 

  10. Ho Y-C, Muhammad K, Lee M-C, et al.: A GSM/GPRS receiver front-end with discrete-time filters in a 90nm digital CMOS. Proceedings of IEEE Dallas/CAS Workshop: Architectures, Circuits and Implementation of SoC (DCAS '05), October 2005, Dallas, Tex, USA 199–202.

    Google Scholar 

  11. Ho Y-C, Hung C-M, Muhammad K, et al.: A 1.8dB NF receiver front-end for GSM/GPRS in a 90nm digital CMOS. Proceedings of International SoC Design Conference (ISOCC '05), October 2005, Seoul, Korea 211–214. ses. 12

    Google Scholar 

  12. Staszewski RB, Wallberg J, Rezeq S, et al.: All-digital PLL and GSM/EDGE transmitter in 90nm CMOS. Proceedings of IEEE International Solid-State Circuits Conference (ISSCC '05), February 2005, San Francisco, Calif, USA 1: 316–317, 600. sec. 17.5

    Google Scholar 

  13. O K: Estimation methods for quality factors of inductors fabricated in silicon integrated circuit process technologies. IEEE Journal of Solid-State Circuits 1998,33(8):1249–1252. 10.1109/4.705364

    Article  Google Scholar 

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Authors and Affiliations

  1. Wireless Analog Technology Center, Texas Instruments Inc., Dallas, TX, 75243, USA

    Yo-Chuol Ho, Robert Bogdan Staszewski, Khurram Muhammad, Chih-Ming Hung, Dirk Leipold & Kenneth Maggio

Authors
  1. Yo-Chuol Ho
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  2. Robert Bogdan Staszewski
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  3. Khurram Muhammad
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  4. Chih-Ming Hung
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  5. Dirk Leipold
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  6. Kenneth Maggio
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Corresponding author

Correspondence to Robert Bogdan Staszewski.

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Open Access This article is distributed under the terms of the Creative Commons Attribution 2.0 International License ( https://creativecommons.org/licenses/by/2.0 ), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Ho, YC., Staszewski, R.B., Muhammad, K. et al. Charge-Domain Signal Processing of Direct RF Sampling Mixer with Discrete-Time Filters in Bluetooth and GSM Receivers. J Wireless Com Network 2006, 062905 (2006). https://doi.org/10.1155/WCN/2006/62905

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  • DOI: https://doi.org/10.1155/WCN/2006/62905

Keywords

  • Noise Figure
  • Automatic Gain Control
  • SRAM Memory
  • Analog Circuit Design
  • Digital CMOS Technology