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A novel sampling synchronization scheme for OFDM-based system with unified reference clock


Due to the constraint of cost and size for mobile wireless communication terminals, many orthogonal frequency division multiplexing (OFDM)-based systems required the same crystal driving the sampling and the channel frequencies, which leads to the challenge of a more comprehensive sampling clock synchronization scheme needed. In this article, the effect of sampling clock error on the system performance was analyzed by dividing it into sampling clock frequency offset (SFO) and sampling timing error (STE) firstly. After that, we proposed a two-stage scheme of sampling clock synchronization based on theoretical derivation: the preliminary SFO was jointly acquired with the carrier frequency offset by using the improved preamble-aided algorithm firstly, the timing drift resulted from residual SFO and STE was tracked based on a phase looped lock in the second stage. The deviation properties of the estimation were achieved theoretically, which reveals that both the estimating variances of SFO and timing drift are in inverse proportion to signal-to-noise ratio and grow linearly by the number of total subcarrier. The results of the simulation show that the proposed synchronization scheme can introduce preferable tracking and robust synchronizing performance for this kind of OFDM-based system.

1. Introduction

Underwater acoustic channels are characterized by severe bandwidth limitations, long inter-symbol interference (ISI) spans, and large Doppler spreads, which lead to significant challengers for reliable communications. Owning to the advantages of high spectral efficiency and robustness against channel fading, orthogonal frequency division multiplexing (OFDM) has been applied in modern communication system extensively such as WLAN, WiMAX, LTE, and DVB-T. OFDM is also a good alternative transmission scheme for underwater communication that both remedies the problem of ISI and provides low complexity solutions. However, OFDM is sensitive to inter-carrier interference (ICI) caused by channel variations. Underwater channels vary fast due to the large ratio of the platform motion relative to the sound propagation speed. Even with stationary transmitters and receivers, significant ICI could still exist due to wave action and water motion. One of the solutions for eliminating ICI is to estimate and correct the frequency shift adaptively in the synchronization procedure. Therefore, the synchronization scheme for OFDM system used in underwater communications is a critical issue [1].

The sampling clock synchronization in an OFDM system is to mitigate the sampling clock errors due to the mismatch of the crystal oscillators between the transmitter and the receiver. The sampling clock error can essentially be divided into two parts: sampling clock frequency offset (SFO) and sampling timing error (STE). SFO means the offset of sampling frequency between transmitter and receiver. STE implies that the sampling does not align at the central of the samples, which was also named sampling clock phase offset in some literatures [2, 3]. The sampling clock error will cause ICI, and a drift in the symbol timing and further worsen ISI [3, 4]. The effects of SFO on the system performance are analyzing in terms of BER degradation and ISI in [4, 5], respectively.

In the aspect of sampling clock synchronization, there are two different kinds of methods: synchronous sampling and asynchronous sampling [6]. Synchronous sampling methods [7, 8] have large timing fluctuation due to high-level phase noise when compared with asynchronous sampling methods [5, 9, 10], but the asynchronous sampling methods traditionally needs the interpolation in time domain, which is computationally complex and needs more processing time. Therefore, it cannot be applied to the area where there is a strict requirement on estimation delay time. Moreover, asynchronous sampling method is more sensitive to carrier frequency offset (CFO). A combined SFO and CFO estimation algorithm is presented in [11, 12]. However, it has such prerequisite that the timing offset and the initial CFO should been corrected ideally.

In many wireless communication systems, such as WiMAX, there are the constraints of low cost and miniaturization for mobile communication device, and the specification requires that the same crystal must be used to drive the sampling and the channel frequency, which is adopted for many personal handheld terminals (e.g., Smart phone) especially. However, the same reference clock property introduces a new challenge for the design of joint carrier and sampling clock synchronization, where the frequency offsets have relationship with the sampling frequency offset besides the Doppler shift. It is seen that most research on joint sampling and frequency synchronization [1115] have only considered the sampling clock frequency synchronization but ignored the STE. In addition, they view the synchronization of sampling clock frequency all at once whereas neglecting the permanent drift of sampling clock frequency.

In this article, an asynchronous scheme for sampling clock synchronization in an OFDM receiver system with the same driving clock source is proposed and analyzed: First, the preliminary SFO is jointly acquired with carrier frequency offset by taking the benefit of the same crystal for both sampling and channel frequencies. Second, by introducing a phase looped lock (PLL) with dynamic adjustable parameters, the timing drift resulted from the residual SFO and STE is tracked and periodically corrected. The proposed scheme has not used the interpolation and consequently lowered the computation complexity and processing time consumption. The requirements of ideal timing offset and the initial CFO are not needed previously because the estimation and correction of SFO was jointly deal with CFO and timing error simultaneously.

This article is organized as follows. First, we, respectively, analyzed the effect of SFO and STE on the performance of OFDM system in Section 2. After that, we have derived the theoretical solution for the estimation of SFO and timing error in Section 3. Based on the derivation result, a practical estimation and correction of sampling clock error scheme is proposed in Section 4. The simulation results and discussion are given in Section 5. Section 6 concludes the article briefly.

2. Analysis of SFO and STE effects on system performance

This section presents the system model and then emphasizes on the analysis of the effect of SFO and STE on the system performance.

The OFDM system model and signal flow are illustrated in Figure 1. It needs to point out the same crystal drives both the sampling and carrier frequency mixing here. As the output of D/A converting, the transmitted OFDM signal during one OFDM symbol duration can be expressed as

s t = k = 0 N 1 A k e j 2 πkt / N T s

where A k denotes the OFDM symbol on the carrier k, N is the number of total carrier, and Ts is the sampling interval for OFDM symbol.

Figure 1
figure 1

OFDM system model with the unified driving crystal.

In the following analysis, for the simplicity we assume the transfer function of channel satisfies H(f) = 1. The s(t) successively passes through the procedures: upper converting onto carrier frequency, additive white Gaussian noise channel, down-converting, then can be written as

r ( t ) = s t e j 2 π f c t + n t e j 2 π f c + f c t = s ( t ) e j 2 π f c t + n ( t ) e j 2 π f c + f c t

In (2), Δf c is the carrier frequency offset between receiver and transmitter, which is caused by Doppler shift and the mismatch between the clock of receiver and transmitter.

Here, we define the A/D sampling interval offset as ΔT = T r T s (T r is the sampling interval of A/D converter), and the STE as Δt, Δt ≤ T s /2. The SFO obviously equals to Δf s  = 1/T r – 1/T s . During an OFDM symbol, the sampling time of A/D converter at receiver is t = nT r – Δt, n = 0,1,,N – 1. The sampled signal can be expressed as

r ( n ) = r ( t ) | t = n T r Δt = k = 0 N 1 A k e j 2 πk n T r Δt / N T s e j 2 π f c n T r Δt + η

and η = n t e j 2 π f c + f c t | t = n T r Δt is the sample of channel noise.

Due to the same driving crystal for sampling and channel frequencies, the relationship between SFO and the carrier frequency offset can be denote as

f c f s = f c f s = ε c N · ε s

where f s equals to 1/T s , ε c is the relative carrier frequency offset and defined as the ratio of Δf s to subcarrier spacing. ε s is SFO normalized by f s . In (4), the effect of Doppler shift on carrier frequency offset has been neglected.

2.1. STE

We first analyze the effect of STE on the received signal. For the convenience of the following derivation, we assume Δf c  = 0 and the symbol timing synchronization is already completed. Formula (3) is changed into

r n = k = 0 N 1 A k e j 2 πk n T r t / N T s + n t e j 2 π f c t | t = n T r t

where n = 0,1,…,N – 1. Let ' = n t e j 2 π f c t | t = n T r Δt . The signal is then transformed into frequency domain

R ( k ) = n = 0 N 1 r n e j 2 πnk / N = n = 0 N 1 m = 0 N 1 A i e j 2 πm n T r Δt / N T s + η e j 2 πnk / N = m = 0 N 1 A i e j 2 πmΔt / N T s n = 0 N 1 e j 2 πn m T r k T s / N T s + η

where η = n = 0 N 1 η e j 2 πnk / N is the interference portion arisen from channel noise. By using the summation of geometric sequence, (6) is changed to be

R k = m = 0 N 1 A m 1 e j 2 π m T r k T s / T s 1 e j 2 π m T r k T s / N T s e j 2 πmt / N T s + η

The R(k) can be further divided into two parts in terms of m = k and m ≠ k:

R k = R 1 k + R 2 k + η


R 1 ( k ) = 1 N A k sin πkT / T s sin πkT / N T s e j π 1 1 / N kT / T s 2 πkt / N T s R 2 ( k ) = 1 N m = 0 m k N 1 A m sin π mT / T s + m k sin π mT / T s + m k / N · e j π 1 1 / N mT / T s + m k 2 πkt / N T s

When the effect of STE is only concerned, we can let sampling interval offset ΔT = 0. According to that sin x/x approach to 0 with x → 0, the first term in (8) comes to A k exp{−j2πkΔt/(NT s )}, and the second term in (8) equals to 0. Consequently, R(k) is expressed as

R k = A k e j 2 πkt / N T s + η

From (9), it can be seen that the STE will not affect the amplitude of the useful signal, neither introduce ICI. However, the received signal has a phase rotation due to STE, and the angle of phase rotation increases linearly with subcarrier index k. When considering Δt ≤ T s /2, the phase rotation effect is slighter than the effect of symbol timing error. Both the phase rotation from STE and symbol timing error can be corrected in synchronization or channel equalization procedure.

2.2. SFO

In the same way, let Δt = 0 when we analyze the effect of SFO on the received signal, formula (8) can be rewritten as

R ( k ) = 1 N A k sin πkT / T s sin πkT / N T s e 1 1 / N kT / T s + 1 N m = 0 m k N 1 A m sin π mT / T s + m k sin π mT / T s m k / N · e 1 1 / N mT / T s + m k s + η

The first term in (10) denotes the useful component, which is attenuated and rotated due to the SFO. The second term represents the interference to the k th subcarrier from other subcarrier, the ICI destroys the orthogonality of OFDM signal and degrade the signal-to-noise ratio (SNR) consequently. The third term is the noise.

For the aims of analyzing the effect of sampling clock synchronization detail, we will extend the above results to the case of successive OFDM symbols. The n th sample of the l th OFDM symbol can be deduced from (3)

r l , n = k = 0 N 1 A l , k e j 2 πk N + N cp l + n T r / N T s + η l

where η l = n t e j 2 π f c t | t = N + N cp l + n T r , and the sampling time t = T r {(N + N cp )l + n}.

Similarly, the received OFDM signal in frequency domain is

R l , k = n = 0 N 1 r l , n e j 2 πnk / N = R 1 l , k + R 2 l , k + η l


R 1 l , k = 1 N A l , k sin πkT / T s sin πkT / N T s · e 1 1 / N kT / T s e 2 πk 1 + T / T s N + N cp l
R 2 l , k = 1 N m = 0 m k N 1 A l , m sin π mT / T s + m k sin π mT / T s + m k / N · e j π 1 1 / N mT / T s + m k e j 2 πm 1 + T / T s N + N cp l / N


η l = n = 0 N 1 η l e j 2 πnk / N

In (12), exp{−2πk(1 + ΔT/T s )(N + N cp )l} in R1(l,k) denotes the phase rotation of the k th subcarrier, which have relation with both subcarrier index and OFDM symbol index. Hence, if the SFO is not compensated during several accumulated symbol periods, the degree of phase rotation will increase in the symbol sequence. When the sampling interval offset satisfies ΔT < 0, A/D converter will produce an extra sample for every –T s T samples. When the relative sampling interval offset satisfies ΔT > 0, A/D converter will lost a sample for every T s T samples, which means the ISI will arise at a later time.

3. Design and theoretical analysis for sampling clock error estimation

Based on the analysis of the effect of sampling clock offset, this section will elaborate on how to achieve the accurate estimation of SFO and STE firstly, then analyze the deviation property of estimation result. Next, the timing drift caused by residual SFO and STE is derived together with performance analysis. On the basis of this, we propose a complete sampling clock synchronization scheme that composed by acquisition stage and tracking stage to realize the estimation and correction of sampling clock error.

3.1. Design of training sequence

The preamble-aided estimation is adopted in this article. The preamble is the first symbol of transmission frame, of which the subcarriers are modulated using a boosted BPSK modulation with a specific pseudo noise (PN) code.

Figure 2 gives the structure of preamble sequence in frequency domain. Only each third of subcarriers (M = N/3) are modulated with PN sequence, the remainder subcarriers are filled with zero. It can be proved that this structure of the preamble in frequency domain means three repletion parts in time domain:

C k = C k + M = C k + 2 M , k = 0 , , M 1

where we assume M = N/3 is integer, C(k) is the PN sequence.

Figure 2
figure 2

The structure of preamble sequence in frequency domain.

The frame period is defined as L s in sample at transmitter, it means the preamble symbol will appear for every L s samples. The measuring of the frame period at receiver is used in the estimation of timing error in the tracking stage.

3.2. Sampling frequency offset estimation

From (4), the estimation of sampling frequency offset can be translated into the estimation of carrier frequency offset, and the result of carrier frequency estimation can be used to compensate both the sampling frequency offset and carrier frequency offset.

In general, the relative carrier frequency offset is divided into fractional part and integer part and estimated separately

ε c = ε F + ε I

where ε F represents the fractional carrier frequency offset (FCFO) and ε I is the integer carrier frequency offset(ICFO).

3.2.1. Fractional carrier frequency offset

Consider the preamble in time domain there are three identical parts, except a phase shift between the adjacent parts caused by the carrier frequency offset. Therefore, estimation of FCFO is based on the idea: if the conjugate of the first part is multiplied by the second part, the effect of channel can be eliminated, and the result is exactly the phase shift.

When neglecting the cyclic prefix, the received OFDM symbol in time domain can be expressed as

r n = k = 0 N 1 C k H k e j 2 πn k + ε F / N

and n = 0,1,…,N – 1. C(k) is the preamble sequence in time domain, and the H(k) is the transfer function on the k th subcarrier. Here, we use ε F to represent the overall carrier frequency offset. It will be proved that the estimation by the method actually is the fractional frequency offset later.

Let define the P(M) as the correlation function of r(n)

P ( M ) = n = 0 M 1 r * n r n + M = n = 0 M 1 u = 0 N 1 C * u H * u e j 2 πn u + ε F / N · v = 0 N 1 C v H v e j 2 π n + M v + ε F / N

By substituting

R h 0 = k = 0 N 1 H k H * k = k = 0 N 1 H k 2

and A = k = 0 M 1 C k 2 into (16), then we have

P M = e j 2 π ε F / 3 M · A · R h 0

From (17), it can be found frequency offset is equal to

ε c = 3 2 π · P M

The estimation range of frequency offset by (18) is (−3π/2, 3π/2), which means that the offset beyond the range cannot to be calculated using the aforementioned method. Therefore, the fractional carrier frequency offset is mainly achieved here.

The derivation in (16) has not considered the channel noise. If the channel noise exists, then the received signal in (15) will be rewritten as

r n = k = 0 N 1 C k H k e j 2 πn k + ε F / N + w n

w n is the complex additive white Gaussian noise with the zero mean and the variance σ n 2. Similarly in [14], it shows the maximum-likelihood estimation (MLE) of the fractional frequency offset is

ε ^ F = tan 1 { Im ( P M / Re P M }

When using the method in [14], the variance of ε F is

D ε ^ F 1 π 2 M · SNR

The ratio of signal power-to-noise power (SNR) on an OFDM symbol is defined as SNR = R h (0)A/σ n 2. Actually, because the fractional frequency offset is the MLE by (20), it states that the Cramer-Rao bounds are almost met by the estimation with high SNR in [14]. Here, the phase shift is calculated over all of the subcarriers in (16), which usually can satisfy the condition of the high average effective SNR.

3.2.2. Integer carrier frequency offset

The integer carrier frequency offset should be estimated in frequency domain for accurate acquisition. We still achieve the estimation by taking the use of the property of PN sequence and preamble structure.

First, it is known that the PN sequence used for the preamble have the auto-correlation property

R c τ = M , τ = i · M 1 / M , τ i · M , i = 0 , 1

We rewrite the value of the k th subcarrier value in received signal in frequency domain as

R k = H k C k + ε I + W k

Here W(k) is the FFT conversion of w(n), which can be proved that W(k) is still a Gaussian variable with the zero mean and variance σ n 2. We use C(k + ε I ) to denote that the signal has shift ε I subcarriers compared to local preamble sequence.

When shifting the local preamble sequence with i subcarriers, then multiplying with R(k):

Y ( k ) = R ( k ) · C ( k + i ) = H ( k ) C ( k + ε I ) C ( k + i ) + W ( k ) C ( k + i )

As to the second term in (24), since the C(k + i) is a BPSK modulated symbol with value +1 or −1, the product will still hold as the same property of Gaussian variable W(k). Especially, when the shift number i equals to the existed frequency offset ε I , the (24) will be

Y k | i = ε I = R ( k ) C ( k + ε I ) = H ( k ) C k + ε I 2 + W ( k ) = H ( k ) + W ( k )

Here, we have used the result |C(k)|2 = 1 and eliminated the C(k) element in the result.

Next, the correlation function of Y(k) is defined as

R y τ = 1 M k = 0 N 1 Y * k Y k + τ

Based on (26), we define a metric of integer frequency offset estimation as

M i = R y 3 / R y 0

It is not difficult to deduce that the value of |R y (3)| on the condition of i = ε I is more large than that while i ≠ ε I . It can be explained as follows. When i ≠ ε I the first term of Y(k) in (24) will be the product of H(k) and random +1/–1, which produces the counteract within the sum of R y (3). For R y (0), it actually represents the total power of signal and noise, which is used in (27) for normalizing the M(i).

Figure 3 shows the metric M(i) at different values of shift i, while the SNR is 0 dB. The received signal is assumed without carrier frequency offset. It is showed that the maximum metric value is achieved at i = 0 as the predicting, which means the maximum metric appears when there are no subcarrier offset between the received preamble sequence and local sequence.

Figure 3
figure 3

M ( i ) versus shift I , no frequency offset.

Therefore, the estimation of integer carrier frequency offset is to find the value of i when satisfying

ε ^ I = argmax i M i

The following will elaborate on the statistical property of M(i). First, we rewrite the (26) while i = ε I

R y τ = 1 M k = 0 N 1 H * k H k + τ + k = 0 N 1 H * k W k + τ + k = 0 N 1 W * k H k + τ + k = 0 N 1 W * k W k + τ

Each term in (29) can be viewed as the arithmetic mean for discrete sequence, when the accumulate number N is large enough, the arithmetic mean is approximately the statistical expectation. Since the result of linear operation on Gaussian random variable is still Gaussian, the second and third terms in (29) are equal to the mean of Gaussian variable, which both come out zero. The fourth term is the autocorrelation of white Gaussian noise, whose result is an impulse function of τ. Then, we simplify (29) into

R y τ = R h τ + σ n 2 · δ τ


R h τ = 1 M k = 0 N 1 H * k H k + τ .

From (30), we have

R y 0 = R h 0 + σ n 2
R y 3 = R h 3

When the coherence bandwidth of channel is greater than the range of three subcarriers, the transfer function on the adjacent three subcarriers is viewed correlatively; therefore, there is the approximation

R h 3 R h 0

Regarding the transmitted preamble sequence, the power of signal can be calculated

σ s 2 = E H k C k 2 = E [ H k 2 = R h 0

Taking (31)–(34) together, we have

M ε ^ I σ s 2 σ s 2 + σ n 2 = 1 1 + 1 / SNR

It can be deduced that the metric approaches to 1 as SNR increases. The metric value is greater than 0.9 when SNR is above 5 dB, which could be used for verifying the result of (28).

3.2.3. SFO

Once the estimation of fractional carrier frequency offset and integer carrier frequency offset are achieved, the sampling clock frequency can be calculated using the linear relationship with the carrier frequency offset as (4).

ε ^ s = f s ε ^ F + ε ^ I f c N

The method in (36) ignores the existence of Doppler shift in the CFO, so the estimation of SFO is not strict. However, we will deal with amend the estimation in tracking stage.

By now we have already achieved the joint estimation of carrier frequency offset and SFO, but the correction for them should be operated independently. The FCFO offset should be corrected in time domain before the estimation of ICFO, and the ICFO is estimated in frequency domain then fed back into time domain to correct the preamble in next frame. With consideration of the effect of SFO given in Section 2.3, the estimation of SFO is translated into timing error and corrected in frequency domain.

3.3. Timing drift estimation

Except residual sampling clock error, the fractional symbol timing error that may be ignored also contributes to the timing drift, which can be considered as a uniform adjustable variable. This adjusting variable is derived in frequency domain and then fed back into time domain to adjust digital oscillator, guaranteeing the synchronization stability. First, we focus on the estimation of timing drift.

We assume that the received signal compensated with the estimation ε s still has the timing drift denoted by Δn sampling interval (note it may be decimals), that is

R k = H k C k e i 2 πkn / N + W k

In order to eliminate C(k) in the first term of (37), we similarly define

Y k = R k · C k = H k e j 2 πkn / N + W k

When τ = 3 the correlation of Y(k) is

R y ( 3 ) = 1 M k = 0 N 1 { H * k H k + 3 e j 6 πn / N + H ( k + 3 ) W * ( k ) e j 2 π k + 3 n / N + H * k W k + 3 e j 2 πkn / N + W k + 3 W * k }

When neglecting the noise, (39) only reserves the first term:

R y 3 = R h 3 e j 6 πn / N

if the coherence bandwidth of channel is greater than the range of three subcarriers, the transfer functions on the adjacent three subcarriers are viewed relatively, the phase of R h (3) is approach to 0. Therefore, the timing drift can be estimated as

n ^ = N 6 π · R y 3

The ML estimation Δn of is

n ^ = N 6 π · tan 1 Im R y 3 / Re R y 3

In the following, we will investigate the performance of the estimator by through finding the statistical distribution of timing drift Δn and its variance.

In (39), since the conjugate of complex Gaussian variable W(k) is still a complex Gaussian with the same expectation and variance, the second and third terms within the summation are independent Gaussian variable. Based on the central limit theorem, the summation of the two terms in terms of k is complex Gaussian process with distribution N(0, 2σ s 2σ n 2), which is expressed as N e = N c + jN s . The imaginary N c and real part N s are independent Gaussian process with zero mean and variance σ s 2σ n 2. The summation of the last term is approximately the autocorrelation of Gaussian noise and turn to be 0 while τ ≠ 0. Therefore, R y (3) in (39) can be rewritten in real and imaginary parts separately as

R y ( 3 ) = { R h ( 3 ) c o s ( 6 π n / N ) + N c } + j { R h ( 3 ) s i n ( 6 π n / N ) + N s }

and define

A c = R h 3 cos 6 πn / N + N c
A s = R h 3 sin 6 πn / N + N s

It is clear that A c and A s are subject to Gaussian distribution according to the property of Gaussian process, and their expectation and variance are

E A c = μ c = R h 3 cos 6 πn / N
E A s = μ s = R h 3 sin 6 πn / N
D A c = D A s = σ s 2 σ n 2

The joint probability density function for A c and A s is

f A c , A s = 1 2 π σ s 2 σ n 2 exp A c μ c 2 + A s μ s 2 2 σ s 2 σ n 2

Let define

G = A c 2 + A s 2 1 / 2
φ = tan 1 A s / A c

It can be seen if we find the statistical property of φ, we will get the distribution of estimation of Δn. By using Jacobian determinant

J = A c G A c φ A s G A s φ = G

The joint PDF of G and φ can be calculated as

f G , φ = J f A c , A s

Thereby we can get the conditional PDF for φ, especially in the condition of high SNR and while φ is small value, the conditional PDF is

f φ = 1 2 π σ n / σ s exp φ 2 2 / σ s 2 / σ n 2

It shows the φ is a Gaussian variable with zero mean and variance σ n 2 s 2. From (54) we can get the variance of Δn

D n ^ = N 2 6 π 2 SNR

The result reveals that the variance of timing drift is in inverse proportion to SNR and grows linearly by square of the number of total subcarrier, i.e., the timing drift will be obvious in the condition of either bad channel quality or large subcarrier number.

4. PLL-based two-stage sampling clock estimation and correction scheme

The proposed sampling clock synchronization scheme composed by acquisition stage and tracking stage is illustrated in Figure 4. The acquisition procedure focuses on the preliminary SFO (carrier frequency offset jointly), of which the fractional part and integer part are handled sequentially. Once the acquisition is completed, it will transfer to tracking stage and no longer return unless the restart of synchronization. In tracking stage, the timing drift is estimated and compensated for each frame by using a PLL. Once locked, the followed samples after correction can be further demodulated.

Figure 4
figure 4

Practical sampling clock synchronization scheme.

4.1. Acquisition stage

The processing of acquisition stage includes estimation and correction of FCFO, estimation of ICFO, and correcting SFO and CFO at last.

The estimation and correction of fractional carrier frequency offset is implemented in time domain. Before that, it is assumed that a coarse symbol timing synchronization is achieved, and then the start position of a frame in sample is already determined with the toleration of ±1/2 cyclic prefix length. In our implementation, the symbol timing method in [13] by exploiting the correlation property of repetition and cyclic prefix is conveniently adopted here.

As the first step of overall synchronization process, it need to extract one preamble sequence (N samples) from the samples of A/D output based on the result of symbol timing synchronization. Let use P s to denote the starting position of the current frame in received samples. When considering the multipath delay of wireless channel, the actual position should be P s + ρN cp , and 0 ≤ ρ ≤ 1. The optimum ρ is set with respect to the average multipath delay, when ρ is too greater, the delayed copy of last symbol will result in interference on the current symbol. When ρ is less than the optimum value, it will result in the ICI to next symbol. Certainly, the arbitrary timing error can be compensated in tracking stage.

Second step, by using the method given in Section 3.2.1, we can get the estimation of fractional carrier frequency offset ε F , correcting is operated on the extract N samples of the preamble

r n = r n · e j 2 πn ε F / N , n = 0 , , N 1

Third step, the N corrected samples are transferred into frequency domain through FFT operation, R(k), k = 0,…,N – 1. According to the method mentioned in Section 3.2.2, the shift i can be found from the maximum metric M(i), which is the estimation of integer carrier frequency offset. Another modified method is to find both the maximum M(i1) and the secondary M(i2). Once the ratio M(i1)/M(i2) exceeds a specific threshold (e.g., 3 in practice) we will take i1 as the estimation of integer carrier frequency offset. The advantage of the latter method is able to avoid the impulsive interference.

Fourth step, as the last step of acquisition stage, is to correct integer carrier frequency offset and the SFO. The integer carrier frequency offset estimated in frequency domain should be fed back to time domain to correct

r n = r n e j 2 πn ε I / N , n = 0 , , N 1

which is similarly with the way of correction for fractional carrier frequency offset, it should be pointed out r'(n) is the time domain preamble after correction based on (56).

In order to correct the derived SFO in frequency domain, the impact stemmed from ε s should be converted into timing error. While the frame length at transmitter in sample is L s , the estimated frame length at receiver as L r , then we can give the relationship between the frame length and sampling clock frequency

γ = L r L s = f s + f s f s

and the timing error caused by SFO can be derived as

n 1 = 2 π 1 + N cp / N γ + 1

In the process of extracting the preamble sequence, another two types of timing error also have been introduced. Actually, the starting position of the current frame is determined by the starting position of the last frame and the estimated frame length

P s = P s , last + L r

Base on (60), the achieved P s may include the fractional part. The integer part of P s is used to extract the preamble sequence, while the fractional part should be compensated

n 2 = 2 π P s mod 1 / N

Another type of timing error is caused by arbitrary delaying the starting position inside cyclic prefix, which is expressed as

n 3 = 2 π N cp · ρ

The three timing errors are corrected together on frequency domain samples

R k = R k · e j 2 πk n 1 · l + n 2 + n 3 / N , k = 0 , , N 1

where l is the OFDM symbol index in one frame and the preamble is the first symbol with l = 1. When the tracking stage is not in the locked state, the preamble is only needed to correct as (63) because the other symbols will not be demodulated currently.

4.2. Tracking stage

Once the processing of acquisition stage finished, the system automatically moves on to tracking stage. In tracking stage, a PLL is used for maintaining the receiver stays time and frequency locked to transmitter. Using the relationship between frequency and timing errors, the PLL initializes the expected frame period. This loop runs from acquisition onwards, adjusting frame timing each frame.

Fifth step, following the acquisition stage, the timing drift is recognized by the method in (42). The estimation of timing drift is first used to update the frame period and the starting position of next frame. The compensation scale in one frame should not be too large in case fluctuation happens, the timing drift is used in an alpha (first-order) PLL to track the starting cycle timing of the next preamble, and a beta (second-order) PLL to adjust the local measure of frame period in samples. Therefore, the frame period and starting position of next frame are updated

L r = L r + n · β , 0 < β 1
P s = P s + L r + n · α , 0 < α 1

The alpha and beta PLL filter values are dynamically adjusted according to the phase of tracking stage, which will be demonstrated in Section 5.

Furthermore, since the same crystal clock used for channel frequency and sampling, the timing drift corresponds to the offset of carrier frequency. The carrier frequency offset can be updated

ε c = 2 π γ 1 f c / γ f s

The correction will operate on the samples of the next frame based on the updated parameters. The correction process is same as that on the fourth step, except for Δn1 on the fourth step should be replaced by Δn.

Sixth step, after tracking the timing drift for several frames, the PLL will transfer into the steady state to allow the corrected data to be further demodulated. The lock metric is defined to indicate whether the PLL is locked or not

M PLL = n · v + M PLL , last · 1 v

where MPLL,last represents the lock metric calculated in last frame, v is the forgetting factor (0 < v ≤ 1). If MPLL exceeds a predefined upper threshold PLL is regarded as locked, and if MPLL is less than a predefined lower threshold it is regarded as losing lock of PLL, then the synchronization system will restart and return back to acquisition stage again. The function of the lock metric is essentially the timing drift passing through a low pass filter with the transfer function

H z = v · z z 1 v

which aims at getting a steady value of lock metric.

The overall sampling clock synchronization scheme is practically described with the aforementioned six steps processing. It is especially pointed out, in this scheme, that the synchronization of both carrier frequency and sampling clock is recovered thoroughly.

5. Simulation and discussion

The simulation is implemented to evaluate the performance of proposed sampling clock synchronization in AWGN channel and multipath fading channel (ITU V-A channel [16]), the multipath channel has been developed with Doppler spread of 38.9 kHz. The parameters of OFDM transmission system are as follows: frame length 5 ms, sampling clock 22.4 MHz (8 times interpolation), subcarrier spacing of 10.94 kHz with 256 subcarriers. The OFDM subcarriers are modulated by QPSK, Reed-Solomon, and circular convolution code are used as the outer and inner forwarding error correction scheme with code rate 1/2.

In the simulation process, the forgetting factor is set to 0.125. Four groups of PLL parameters are used for specified number of frames sequentially, and the alpha and beta filter values reduce as the group index increasing: the first group with α = 0.1, β = 0, the second group with α = 0.1, β = 0.0025, the third group with α = 0.05, β = 6.25 × 10–4 and the fourth group with α = 0.01, β = 2.5 × 10–5. As the alpha and beta filter values reduce the PLL loses its ability to make large adjustments to the timing, but tracks the training symbol to a great resolution.

Figure 5 depicts the tracking process of SFO in AWGN and multipath fading channel. The simulation is performed at SNR 10 dB and normalized SFO 73.728 ppm. In the first 100 number of frames, the PLL is initialized using the first group parameters, of which the beta filter value is set to zero for considering that the timing error is mainly caused by the inaccurate of symbol timing at the beginning of synchronization, so sampling clock frequency remains major error. The next two group parameters are used for 100 number of frame sequentially, but during the third 100 frames if the lock metric exceeds a upper threshold 1 it will retreat running with the second group parameters. From Figure 5, it can be seen that the SFO is nearly eliminated after 300 number of frames. Since then the fourth group parameters are bring into use all the time unless the lock metric exceed the threshold 0.1 and go back using the third group parameters.

Figure 5
figure 5

SFO tracking process.

Because the CFO synchronization in the proposed synchronization scheme is the fundamental algorithm, which affects the performance of overall the synchronization scheme, the proposed CFO synchronization algorithm is compared with another two typical methods of frequency offset synchronization in simulation, the algorithm (Schmidl’s algorithm for short) by using training sequence in [17] and the algorithm (Beek’s algorithm for short) based on the cyclic prefix [18]. For the convenience of analysis of results, the mean square error (MSE) between actual offset and the estimation result is adopted. Figures 6 and 7 show the comparison of three CFO synchronization schemes in term of MSE norm. it can be seen that the proposed scheme achieves about 10–5 MSE from 0 dB SNR, which is obviously better than the other two methods.

Figure 6
figure 6

Estimation of CFO in AWGN channel.

Figure 7
figure 7

Estimation of CFO in multipath channel.

The BER performance of the proposed synchronization scheme in multipath channel is given in Figure 8. In the simulation, we adopt the method of symbol timing synchronization proposed in [19]. The BER is figured up after the PLL is locked. The simulation result shows that, when using proposed synchronization scheme together with robust QPSK modulation and RS + CC with 1/2 code rate, the BER approach 10–6 when SNR ≥ 4 dB. It proved that the proposed sampling clock synchronization scheme can achieve preferable performance for the OFDM system with unified driving crystal.

Figure 8
figure 8

BER performance of proposed synchronization scheme.

6. Conclusion

Regarding the requirement of miniaturization and low cost for wireless personal communication device, on which the same crystal to drive the sampling and channel frequency is equipped generally. The proposed scheme of sampling clock synchronization is perfectly appropriate for this kind of OFDM-based communication system. One of the advantages of the scheme is that it needs not an accurate result of symbol timing synchronization (only with the toleration of ±1/2 cyclic prefix length). This scheme also has the advantage of low complexity that has been verified on a multi-core DSP platform for a wireless system in author’s research work.


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This study was supported by the National Science and Technology Major Projects under grant 2012ZX03003011 and 2012ZX03003007, and the BUPT Research Innovation Project under grant 2011RC0111.

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Correspondence to Zhuo Sun.

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Sun, Z., Peng, T. & Wang, W. A novel sampling synchronization scheme for OFDM-based system with unified reference clock. J Wireless Com Network 2012, 368 (2012).

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  • System synchronization
  • Sampling clock error
  • Joint estimation
  • PLL
  • Timing drift