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Design and implementation of AD9361based software radio receiver
EURASIP Journal on Wireless Communications and Networking volume 2019, Article number: 95 (2019)
Abstract
Existing software radio platforms constructed by discrete devices have many disadvantages, such as high power consumption, high cost, and poor portability. In this study, an AD9361based software radio communication system was designed on the basis of the zeroIF bandpass sampling software radio structure to solve the poor universality and expansibility problem of traditional software radio receivers. In the AD9361based software radio communication system, the influences of channels on received signals and the intersymbol interference caused by the multipath configuration are offset and eliminated by the minimum meansquared error (MMSE) equalization algorithm. The simulation analyses on the core functions, including group detection, frame synchronization, channel estimation, and frequencydomain equilibrium, of the designed receiver was performed by ModelSim. The receiving functions of the software radio were realized by the core radio frequency (RF) board of AD9361 and the digital baseband development board of ZC706. The signal frequency spectra received and sent by the designed receiver overlap on the basis of the joint debugging and testing of the RF and digital baseband modules. Test results demonstrate that the designed software radio receiver has a reasonable structural design and can meet the design requirements in terms of overall performance. Additionally, the repeated development process of traditional software radio receivers is simplified, and the integration level and expansibility of the system can be improved. The results can provide valuable references for the development of universal software radio receivers.
Introduction
Software radio has overcome the disadvantage that previous communication platforms with different communication functions and frequency bands cannot communicate mutually. Existing software radio platforms are constructed by discrete devices, which are constrained by high power consumption and high cost. This situation not only requires technicians to be experienced in hardware design and radio frequency (RF) signal processing, but it also poses high access requirements for software. Given the coexistence of 3G and 4G communication standards, and even that of 5G, there are multiple frequency bands around the world. Traditional software radio designs require different hardware platforms to support varied communication protocols and frequency bands, and they require long development periods and high design costs.
Andrews et al. [1] suggested the use of a mixer as the firstlevel structure of a software radio to reduce noise at the cost of power with the supply voltage of the baseband lownoise amplifier increased. Murphy et al. (2012) put forward the use of a noisecanceling technology as the software radio structure. Useful signals were enhanced by increasing the auxiliary channels and offset noises at the output terminal, thus improving the noise reduction capability and the overall performance of the software radio system [2]. Zhang et al. propounded a software radio technique that can eliminate the spatial incident angle interference and frequency interference in signal filtering [3]. Loubser and Swart [4] encoded two existing CRspecific media access control protocols by using a CRspecific simulator. Kamaleldin and Ahmed put forward that hardware platforms of software radio system which support many wireless standards could be realized by dynamical program reconfiguration [5]. Marwanto et al. [6] proposed ARDUINO UNO and XBee technologies for software radio systems to reduce the costs of spectrum exchange information based on OFDM. Sahoo et al. propounded a multichannel finite impulse response filter for software radio, which can reduce power consumption effectively by the launcher umbilical tower, and can be applied to software radio systems with multichannel filter efficiently [7].
Tsinghua University (2014) completed a chip for software radio receivers in the working frequency band of 0.1–5 GHz. Qin and Wang et al. constructed a radio communication system platform in Matlab and a universal software radio peripheral to increase the utilization of spectrum resources. Spectrum sensing and available spectral bandwidth estimation of signals of master users were obtained by performing an energy detection method. Thus, spectrum detection was realized, and a set of judgment criteria was provided for the spectral access of secondary users [8]. Xu and Yu designed and completed a fault prediction software platform for an airborne software radio system by analyzing its structure [9]. Cui [10] designed a communication terminal for the timehopping spread spectrum of the TDMA system based on the software radio concept, realized the singlechannel launching and multichannel reception of RFs, and accomplished the design of RF modules and their link terminals. Zhang et al. [11] designed a monitoring system over interferences and multipath in the signal bands and adjacent frequencies of current four navigation systems based on softwaredefined radio concept. Yin and Cheng [12] built a new hardware design program for the software radio processing platform with highperformance and low power consumption based on the requirements of special radio communication systems with low power consumption.
Extant studies have reported that software radio systems are generally limited by their structures. Studies based on AD9361 RF modules and processing modules of SOC digital basebands remain underexplored. Covering most bands with the charter and licensefree bands, the working frequency range of AD9361 is from 70 MHz to 6.0 GHz. The supported channel bandwidth is from less than 200 kHz to 56 MHz. With the RF front end and the baseband of the flexible mixed signal integrated, AD9361 provides a configurable digital interface for the processor and integrates frequency synthesizer, thus simplifying the import of the design, which can achieve lower noise and higher accuracy of modulation with the high programmability. In this study, an AD9361based software radio structure was constructed by using the broadband zeroIF bandpass sampling software radio structure. The corresponding software radio receiver was designed, which achieved many core functions, such as group detection, frame synchronization, channel estimation, and frequencydomain equilibrium. The results can provide new universal platforms and methods for software radio receivers.
Methods
Structure of software radio system
The software radio system is mainly composed of RF module and digital baseband processing module. The RF module converts RF analog signals to baseband digital signals and vice versa, and it facilitates RF receiving and transmitting. The communication protocol in the physical layer is realized by the digital baseband processing module, which ensured signal encoding/decoding, and facilitated modulation and demodulation [13]. The structure of the software radio system is shown in Fig. 1.
Implementation of software radio receiving terminal
The receiving terminal of the software radio performs group detection, frame synchronization, channel estimation, frequencydomain equilibrium, RS decoding, inverse mapping, and so on. In the main signal processing of the digital baseband receiving module, the first step is to conduct group detection, followed by signal synchronization and channel estimation based on training sequences. Then, signals are balanced on the basis of data from channel estimation to compensate for the frequencyselective fading of signals caused by multipath transmission. Finally, RS decoding and 16QAM demodulation are accomplished. The structure of the software radio receiver is shown in Fig. 2.
The structure of AD9361
AD9361 is composed of the 2 × 2 transceiver, the configuration interface of Serial Peripheral Interface (SPI), the AUXADC, internal PLLs, the programmable GPO, and the data bus of 2 × 12 bits which can be configured as differential or single terminal. Each transmitting and receiving channel of AD9361 is independent. The two receiving channels are composed of lownoise amplifier, mixer, amplifier, filter, and ADC. The two transmitting channels are composed of DAC, filter, amplifier, lownoise amplifier, and mixer. The configuration interface of SPI is compatible with the standard mode of four lines. The structure of AD9361 is shown in Fig. 3.
Group detection
Group detection is performed by using the leading structure. The circuit used for group detection is shown in Fig. 4, which is designed and realized according to the circuit procedure [14].
The value of delay correlation C_{n} is:
where r_{n} is the received signal, and C_{n} is the mutual correlation between the currently received L data and the L data received before D.
The value of received signal energy P_{n} is:
The decision variable m_{n} of the delay correlation algorithm is:
The value of m_{n} for group detection can be determined by the leading structure when the signaltonoise ratio (SNR) is 15 dB. A value of C_{n} approaching 0 indicates that effective data transmission has not been achieved and only noise exists. Parameter m_{n} begins to increase with the occurrence of the secondary shorttraining symbol and begins to decrease when the ninth period is reached.
A simulation on the basis of the ModelSim platform is conducted. The simulation results of group detection are shown in Figs. 5 and 6.
DataInRe and DataInIm are the real part and imaginary part of the current data, respectively. SumMagnitude is the sum of relevant window energies, and SumDelayCorrelation is the sum of correlation coefficients of relevant windows. BufferForDetection represents the initial judgment samples of 32 continuous groups, and BufferForDetection represents the judgment samples at the end of 48 continuous groups. As shown in Figs. 4 and 5, SumMagnitude and SumDelayCorrelation are immediately calculated after a system reset and when the effective signal of the grouping detection elevates. When 32 samples are detected continuously, data grouping of judgment arrives. When the SumMagnitude of the 48 continuous samples is smaller than the threshold, the data grouping is completed.
Frame synchronization
The frame synchronization of signals requires the calculation of the crosscorrelation coefficient between the received data groups and the locally known shorttraining symbols [15]. Crosscorrelation coefficient C_{k} can be expressed as:
where the superscript ^{∗} is a conjugation, and D is the length of the crosscorrelation coefficient, which is determined to be 16. The positions of the shorttraining symbols are judged according to the value of ∣C_{k}∣. The moment of the last peak of ∣C_{k}∣ is designated as the end point of the shorttraining symbols.
The simulation results of frame synchronization based on the ModelSim platform are shown in Fig. 7.
DataInRe and DataInIm are the real part and imaginary part of input data, respectively. DataInEnable is the enable signal of input data, and PCouter is the number of detected peaks. First, quantization is implemented when the data to be synchronized arrives. Then, the correlation is calculated on the basis of the 16 local shorttraining symbols, and the moment at the ninth peak is viewed as the end point of the shorttraining symbols. Finally, longtraining symbols and data symbols are designated with serial output according to the output format with the cyclic prefix eliminated at the same time. As shown in Fig. 7, DataOutEn is the effective time for outputting one symbol denoted as 1 and 2 successively which calculates from the longsequence, with the data symbols started from 3. This scheme is viewed as one cycle of output data.
Channel estimation
Channel estimation is first performed to estimate the received signals from the time domain, according to which the estimation of frequency domain can be easily obtained [16]. Then, the received signals of the estimator can be expressed as:
where h(t) is the impulse response, r(t) represents the received signals, s(t) denotes the theoretically received signals, and n(t) is the signal noise. The estimated value of the input signal \( \widehat{s}(t) \) is produced by the convolution of inverse channel system \( \widehat{h}(t) \) that is composed of r(t) and h(t), where \( h(t)\otimes \widehat{h}(t)=\delta (t) \).
The estimation of the channel frequency response of the frequency domain can be deduced directly from the time domain. Channel frequency response H(jω) is estimated by using r(t), and the inverse channel system \( \widehat{H}\left( j\omega \right) \) is constructed by using H(jω). Therefore,
where \( \widehat{H}\left( j\omega \right)=\frac{1}{H\left( j\omega \right)} \).
Channel estimation is realized by the unique words (UW) inserted into the data sequence. If UW is {x_{m}} with a length of P, then the channel frequency response \( {\widehat{H}}_k \) can be estimated by FFT from the transmitting sequences {x_{m}} and {y_{m}} to {x_{m}} and {Y_{m}}.
The corresponding timedomain discrete signal {h_{m}} can be initially obtained from the IFFT operation of \( {\widehat{H}}_k \) at the point P, where P denotes the length. Then, the zeropadding operation of {h_{m}} is performed, thus obtaining the {h_{m}} of the point M. Finally, the frequency response value \( {\widehat{H}}_k \) is acquired from the FFT operation of {h_{m}} of the point M.
The frequency domain is calculated on the basis of the time domain as part of the channel estimation. The received signals can be expressed by the Y = XH + V matrix as follows:
where X = diag[X(0), X(1), … , X(N_{p − 1})], Y = [Y(0), Y(1), … , Y(N_{p − 1})]^{T}, and H = [H(0), H(1), … , H(N_{p − 1})]^{T}. N_{p} is the number of UW. The firstorder derivative and the secondorder derivative of J_{LS} for H are calculated as follows:
The minimum can be derived from Eq. (11). If Eq. (11) is 0, then:
Thus, the estimated value denoted by \( {\widehat{H}}_{LS} \) can be expressed as:
where n is the estimation error, and n = X^{−1}V. The simulation results of channel estimation based on the ModelSim platform are shown in Fig. 8.
DataInRe and DataInIm are the real part and imaginary part of input data, respectively. DataInEnable is the enable signal of input data, and ChannelcoeEnable is the enable signal of output data. ChannelcoeIm and ChannelcoeRe are the real part and imaginary part of output channel estimation, respectively.
Frequencydomain equilibrium module
Frequencydomain equilibrium is performed to offset the effects of channels on the received signals. Here, the minimum meansquared error (MMSE) equilibrium algorithm is applied as the frequencydomain equilibrium [17].
Suppose that the set of transmitting data is denoted by s (s = [s_{0}, s_{1}, … , s_{N − 1}]^{T}), N is the number of FFT points (h = [h_{0}, … , h_{L − 1}.0, … , 0]^{T}), and L is the length of impulse response. Then, the received signal vector is r = [r_{0}, r_{1}, … , r_{N − 1}]^{T}. Accordingly,
where ⊗ is the cyclic convolution, and v = [v_{0}, v_{1}, … , v_{N − 1}]^{T} is the channel noise. On the basis of the FFT of Eq. (14),
where \( {H}_k=\sum \limits_{m=0}^{L1}\left({h}_m{e}^{j2\pi km/N}\right) \), and R_{k}, S_{k}, H_{k}, and V_{k} are the frequency domain values of received signals, transmitting signals and channel impulse response function, and additive white Gaussian noise.
If the equilibrium coefficient is W_{k}, then the frequencydomain output after equilibrium is:
According to its definition, the mean square error (MSE) after the equilibrium can be deduced.
Suppose that \( {\sigma}_N^2 \) is the noise power on the frequency domain and \( {\sigma}_S^2 \) is the signal power on the frequency domain, then:
On the basis of Eq. (18) and Eq. (19), the following can be derived:
If argz_{1} = arg z_{2}, z_{1} − z_{2}≥ z_{1} −  z_{2} (z_{1}, z_{2} ∈ W) is true, then:
where F_{k} uses the lower limit value based on the condition of argW_{k}H_{k} = arg 1 = 0.
If the lower limit of F_{k} is y, then the minimum y should be calculated, such that:
To derive the minimum of y:
Given that \( \frac{\sigma_S^2}{\sigma_N^2}=\mathrm{SNR} \), the MMSE equilibrium coefficient can be expressed as \( {W}_k=\frac{H_k^{\ast }}{{\left{H}_k\right}^2+1/\mathrm{SNR}} \). In Eq. (24), 0 ≤ k ≤ N − 1 and SNR denotes the signaltonoise ratio of the transmitting terminal.
The simulation of signals based on the MMSE algorithm is conducted in Matlab. The following parameters are included:
Multipath channel: the corresponding power of the SUI.3 channel model is [0, − 5, − 10 dB];
Modulation mode: 16QAM;
SCFDE system parameters: UW uses the Chu sequence, and the length is N = 64;
M = 256, and the MMSE equilibrium algorithm is used.
The hardware implementation block diagram of channel equalization module based on FPGA is shown in Fig. 9.
SCFDE symbols in the time domain are read from “buffer of RX frame sample” by the channel equalization module and sent to the FFT module to calculate the frequency domain values of SCFDE symbols.
Frequency domain values are read from “buffer of CSI” by the CSI_ACQ module, which can complete the integration of corresponding samples meanwhile.
With the complex multiplication of the corresponding sample points completed by the FDE_CORE module, the frequency domain equalization is achieved.
Meanwhile, with the subsequent IFFT_256 module controlled by the FDE_CORE module, the sample points in the frequency domain after the equilibration are restored to the time domain and stored in the symbol buffer of SIG domain and the time buffer of DATA domain, respectively.
The simulation results of the channel equilibrium based on the ModelSim platform are shown in Fig. 10.
DataInRe and DataInIm are the real part and imaginary part of the input data, respectively. DataInEnable is the enable signal of input data. DataOutRe and DataOutIm are the real part and imaginary part of output data, respectively.
RS decoding
The design procedures of the RS decoder are as follows:

1.
The adjoint polynomial s(x) of RS codes is calculated from the receiving codes.

2.
The error position polynomial a(x) and error value polynomial δ(x) are solved by an adjoint polynomial.

3.
The error position can be acquired by using the Chien searching method to calculate the roots of error location polynomials.

4.
The error magnitude corresponding to each error location can be obtained from the error value polynomial by using the Fomey algorithm, namely C(x) = R(x) − E(x).

5.
After decoding, the adjoint formula of the codeword is calculated again, and the adjoint formula is determined by detecting whether the adjoint formula is zero or not.
According to the above procedures, RS decoder should include four parts: the adjoint polynomial calculation module, the key equation solving module, the money search module, and the Fomey algorithm module [18].
Specific procedures of RS decoding design are as follows:
1. Solving the adjoint polynomial of RS decoding. The parameters of RS (255,191) are as follows:
Encoding length: n = 255
Information bit length: k = 191
Parity bit length: 64
Error correcting capability: t = 32
Primitive polynomial:
The generating polynomial of RS (255,191) is as follows:
The RS is solved by using a, a^{2}, a^{3}, … , a^{32}, in which R(x) = r_{0} + r_{1}x + r_{2}x^{2} + … r_{n − 1}a^{(n − 1)}. The 32 adjoint expressions of RS (255,191) codes are acquired, namely s_{1}, s_{2}, s_{3}, … , s_{32}.
2. Solving the error position polynomial. Firstly, the error location polynomial δ(x) is obtained, then the error location polynomial and the error value polynomial are obtained. The error location polynomial δ(x) can be defined as:
The error location is θ_{1}. … θ_{t}. The right part of the expansion equation is simplified as follows:
The error location polynomial is acquired:
3. Solving the error position. The error location of receiving polynomial R(x) = r_{0} + r_{1}x + Λ + r_{n − 2}x^{n − 2} + r_{n − 1}x^{n − 1} is acquired according to the root of δ_{1}x.
4. Ascertaining the error pattern E(x) and the polynomial of c(x). The error value polynomial is defined as follows: ω(x) = S(x)δ(x), which is simplified as follows:
The following equations can be verified.
The error value polynomial ω(x) = ω_{1}x + ω_{2}x^{2} + ω_{t}x^{t} can be obtained if ω_{1} = s_{1}, ω_{2} = s_{2} + δ_{1}s_{1}, Λ, ω_{t} = s_{t} + δ_{1}s_{t − 1} + Λδ_{t − 1}s_{1}. The error pattern \( E(x)=\sum \limits_{i=1}^t{Y}_i{x}_i^{ti} \) can be obtained by \( {Y}_j=\frac{{x}_j\omega \left({x}_j^{1}\right)}{\delta \left({x}_j^{1}\right)} \). Here, x_{j} is the root of the Chien searching method. The final actual code C(x) is obtained with E(x) and the receiving code R(x) superposed.
5. Calculating the adjoint formula of the codeword again. The decoding result is determined by detecting whether the adjoint formula is zero or not.
The RS decoding is implemented on FPGA. The simulation results are shown in Figs. 11, 12, and 13.
As is shown in Figs. 11 and 12, the output of RS encoding is used as the input of RS decoding data. The input is as follows: (1, 2, 3, …, 190, 191, 204, 5, 85, 10, 239, 109, 76, 117, 180, 235, 220, 44, 210, 158, 235, 68, 138, 211, 46, 185, 196, 249, 194, 92, 219, 237, 254, 229, 151, 239, 246, 19, 26, 219, 66, 100, 210, 157, 6, 208, 187, 169, 68, 168, 78, 28, 34, 163, 42, 134, 149, 43, 0, 88, 70, 90, 93, 129, 173, 131, 235, 192, 66, 34). If the output data of RS decoding is the input of RS encoding, the output is correct. Namely, the output is (1, 2, 3, …, 190, 191). As is shown in Fig. 13, the RS decoding decodes the encoded data. The RS encoding is correct.
16QAM demodulation module
RS decoding is followed by the 16QAM demodulation. With the orthogonal coherent demodulation method applied, the signal is judged, detected, and converted in series and parallel, and the final output is generated.
The expressions of demodulated I branch and Q branch are shown in Eq. (33).
With \( \frac{1}{2}{X}_k\cos 2 at+\frac{1}{2}{Y}_k\sin 2 at \), \( \frac{1}{2}{Y}_k\cos 2 at+\frac{1}{2}{X}_k\sin 2 at \), \( \frac{1}{2}{X}_k \), and \( \frac{1}{2}{Y}_k \) filtered by the low pass filter, the output of 16QAM demodulation is obtained. The expression is as follows:
The constellation of the 16QAM modulation is shown in Fig. 15, and its mapping output value is d = (I + jQ) × K_{MOD}, where \( {K}_{\mathrm{MOD}}=1/\sqrt{10} \). The constellation of the 16QAM modulation is shown in Fig. 14.
The Iway component and Qway component correspond to b_{0}˴b_{1} and b_{2}˴b_{3} in the code elements b_{0}˴b_{1}˴b_{2}˴b_{3}, respectively. With the decision thresholds set as −2 × K_{MOD}, 0 and 2 × K_{MOD}, respectively, the I and Q can be demodulated now.
Experiment results and discussion
With the AD9361 used as the RF module, ZC706 applied as the digital baseband processing module of SOC, and ZC706 utilized as the ARM+FPGA framework, the hardware platform of the software radio system is built. The physical connection between AD9361 and ZC706 is shown in Fig. 15. The AD9361 board card and the ZYNQ ZC706 development board are connected by FMC. A spectrum analyzer is used as the tester of the transmitting and receiving terminals during the system test. The accuracy of the system test is evaluated by observing the frequency spectra.
Joint testing is performed for the designed software radio receiver, which is based on the hardware platform of AD9361. The test framework of the receiving terminal is shown in Fig. 16. The transmitting central frequency, transmit gain, and bandwidth are 1.435 GHz, 15 dB, and 20 MHz, respectively. AD9361 is connected to ZYNQ via FMC, and ZYNQ is connected to the spectrum analyzer via JTAG. The final results are displayed through the spectrum analyzer. The detailed procedure can be described as follows: signals are received, signals are inputted into AD9361 via the antenna, and these input signals are sent into the digital baseband processing module to complete the processing after amplification, mixing, filtering, and A/D conversion based on AD9361.
AD9361 is set as the working modes of 1R1T, LVDS, and TDD. The ADC frequency is set as 13 MHz, and the local frequency is set as 1.435 GHz, which can be displayed through the spectrum analyzer. The frequency spectra at the receiving terminal are shown in Fig. 17.
Joint testing is also performed for the transmitting signals and the receiver, with the transmitting and receiving frequency spectra examined, which are shown in Fig. 18.
As shown in Fig. 16, the transmitting frequency spectrum is located in the upper position, while the receiver frequency spectrum is located in the lower position. The overlapping of the frequency spectra of the transmitting signals and receiver indicates the consistency of parameters between the transmitting and receiving signals. Therefore, transmitting signals are received accurately.
In this study, a joint experiment of RF module and digital baseband processing module is carried out. The experiment is carried out by two modules combined with a signal source and a spectrum analyzer. But there is no video display part and signal compression part, which can be added to the system to promote the applications in our future research.
Conclusions
An AD9361based software radio system was designed by using AD9361 as the hardware platform. The receiving function is realized, with the modules for group detection, frame synchronization, channel estimation, and frequencydomain equilibrium designed. Finally, the results of the software radio receiver were optimized and verified. The major conclusions from this study are as follows:

1.
The singlecarrier frequency domain equilibrium is applied on the digital baseband physical layer, which is optimized on the basis of the SCFDE communication protocol. Then, the receiving function on the basis of the software radio receiver is realized by using the optimized communication protocol. The system can effectively resist the frequencyselective fading of channels, thus achieving highrate and largecapacity communication transmission.

2.
Peak to average power ratio and the sensitivity to the phase noise are decreased by the MMSE equilibrium algorithm, thus enhancing the resistance against multipath interference.
The AD9361based software radio receiver presented in this study has a reasonable structure, and its performance indexes are satisfactory. The proposed system can effectively increase the communication speed and capacity, remarkably ameliorate the reduction of signal quality caused by multipath fading, and excellently offset the poor universality and expansibility of traditional radio receivers. The results of this study can serve as a useful reference in the development of nextgeneration universal software radio receivers.
Abbreviations
 FFT:

Fast Fourier transform algorithm
 FMC:

FPGA Mezzanine Card
 FPGA:

Field programmable gate array
 IF:

Intermediate frequency
 JTAG:

Joint Test Action Group
 MMSE:

Minimum meansquared error
 MSE:

Mean square error
 QAM:

Quadrature amplitude modulation
 RF:

Radio frequency
 SCFDE:

Singlecarrier frequency domain equalization
 SNR:

Signaltonoise ratio
 SOC:

System on chip
 SPI:

Serial Peripheral Interface
 TDMA:

Timedivision multiple address
 UW:

Unique words
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Acknowledgements
This work was supported by the Project of Science and Technology of Shaanxi (No.2018GY151).
Funding
This work was supported by the Project of Science and Technology of Shaanxi (No.2018GY151).
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Correspondence to Feng Tian.
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Feng Tian is currently an associate professor of College of Communication and Information Engineering, Xi’an University of Science and Technology.
Hanqing Li is currently pursuing an MS degree at the College of Communication and Information Engineering, Xi’an University of Science and Technology.
Liangchen Yuan is currently pursuing an MS degree at the College of Communication and Information Engineering, Xi’an University of Science and Technology.
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The authors declare that they have no competing interests.
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Tian, F., Li, H. & Yuan, L. Design and implementation of AD9361based software radio receiver. J Wireless Com Network 2019, 95 (2019) doi:10.1186/s1363801914206
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Keywords
 Software radio
 Receiver
 AD9361
 Frequencydomain equalization
 Channel estimation